pspice計(jì)算機(jī)仿真

1、PSpice計(jì)算機(jī)仿真,Simulation Program with Integrated Circuit Emphasis,CH4,ADDITIONAL DC ANALYSIS附加直流分析,,4.1 Computing the Thevenin Equivalent戴維南等效4.2 Sensitivity Analysis靈敏度分析4.3 Simulating Resistor Tolerances誤差電阻的仿真,4.1

2、 Computing the Thevenin Equivalent,The open-circuit voltageThe short-circuit current,Fig.35,Example 4,Use PSpice to find the Thevenin equivalent with respect to terminals a, b for the circuit shown in Fig.35 (P29).,To c

3、ompute the short-circuit current,We inserted a resistor(R2) between nodes a and b (node 0) whose value is 10e-6. (Fig. 36),Fig. 36 short-circuit current,Do not forget!,F1的屬性需要修改:選中F1元件, (粉色表示選中!)Edit ->Properties…G

4、ain項(xiàng): 3 (Fig. 36a),Fig. 36a Edit Properties,,在OrCAD Capture運(yùn)行環(huán)境下:PSpice->Run在OrCAD PSpice A/D Demo運(yùn)行環(huán)境下:View->Output file (Fig. 37),Fig. 37 output file,,The short circuit current, which is the current through t

5、he voltage source V3, is 2 A.,To compute the open-circuit voltage,We have two options:Connect a resistor between nodes a and b, in his case 10e6 (Fig. 38)Connect a capacitor between nodes a and bThe capacitor behaves

6、like an open circuit during dc analysis and, therefore, does not influence the dc Thevenin equivalent.,Fig. 38 open-circuit voltage,,OrCAD Capture環(huán)境:PSpice->RunOrCAD PSpice A/D Demo環(huán)境:View->Output file (Fig. 39

7、),Fig. 39 output file,,Note that node a in the original circuit (Fig. 35) is assigned as node 54 (It may be different with yours.) by PSpice, so the open-circuit voltage is 12 V.,The Thevenin equivalent,Open-circuit vol

8、tage12VShort-circuit current2ATherefore, the Thevenin resistance is 12/2= 6 ? and the Thevenin equivalent circuit is as shown in Fig. 40.,Fig. 40 Thevenin equivalent,4.2 Sensitivity Analysis(靈敏度分析),Example 5 illustra

9、tes how to perform sensitivity analysis to predict the behavior of an unloaded voltage-divider circuit(空載分壓電路).,Fig. 41(P33),Example 5,Use PSpice to study the sensitivity of the output voltage Vo in the voltage divider c

10、ircuit shown in Fig. 41.,Fig. 42,Components,Analog/RSource/VDC注意:Out 為節(jié)點(diǎn)的名字, Place/Net Alias…,Simulation,PSpice/New Simulation Profile (Fig. 43),Fig.43_setting,,PSpice/RunPSpice/View Output File (Fig. 44),Fig.44_Ou

11、tput file,,,From the sensitivity data, we deduce thatIf R1 increases by 1?, Vo will decrease by 0.8V, that is, Vo=99.2VIf R1 increases by 1%, Vo will decrease by 0.2V to 99.8V,,If R2 increases by 1?, Vo will increase b

12、y 0.2V, that is, Vo=100.2VIf R2 increases by 1%, Vo will increase by 0.2V to 100.2V,,If V1 increases by 1V, Vo will increase by 0.8V, that is, Vo=100.8VIf V1 increases by 1%, Vo will increase by 1V to 101V,Question?,If

13、 R1 increases by 1?, R2 decreases by 1%, and V1 increases by 0.5V, Vo=?,Answer!,We have a linear circuit, so the principle of superposition (疊加原理) applies, and therefore,Vo=100 - 0.8 - 0.2 + 0.4=99.4 V,4.3 Simulating Re

14、sistor Tolerances(誤差電阻的仿真),,Example6,Replace the 100? resistor in the circuit in Fig.41 with a resistor having the same value but with a 10% tolerance. Use PSpice to discover the range of output voltage values that you

15、 can expect with this more realistic model of a resistor.,Fig. 45,R2屬性修改：,選中電阻R2，(粉色表示被選中!)單擊鼠標(biāo)右鍵，選擇Edit Properties…, Fig.45在Tolerance項(xiàng)，寫入“10%”, Fig. 46背景；選中Tolerance項(xiàng),單擊Display按鈕，出現(xiàn)Fig. 46 對(duì)話框；,Fig. 46,,DC sweep analy

16、sisMonte Carlo/Worst Case,Fig. 46a DC sweep analysis,Fig. 47 Monte Carlo/Worst Case,Fig. 48 maximum,Fig. 49 output file,,You can confirm this result using the voltage division equation for the circuit in Fig. 41 when th

17、e R2 resistor has the value 110 ?.,Fig. 50 minimum,Fig. 50a output file,,You can confirm this result using the voltage division equation for the circuit in Fig. 41 when the R2 resistor has the value 90 ?.,,Thus, we see t